VLSI Training

Team makes the difference...

Our system-oriented approach to understanding this increased level of abstraction will help you appreciate the essentials as well as the nuances of the current industry trends. Our hardware engineering background allows us to share our experiences and expertise in an easy to follow and friendly manner, without overdose of features.

We will help you dissect the fundamentals behind TLM, OO-based frameworks, Assertions and Coverage-driven verification!

Pragam offers a rigorous and extensive training program (with emphasis on hands-on lab work) for getting the most out of design and verification

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Pragam's SystemC training will help you appreciate the key concepts of SystemC, enabling you to construct and evaluate system-level designs. The emphasis on "System-level" modeling aspects will allow for a much faster and a more effective "System-definition" cycle.

SystemC Training - Course Contents (includes lab exercises)

• Introduction to Object Oriented Design, 
• Introduction to C++ and key features relevant to SystemC, 
• Introduction to basic concepts in SystemC-
• SystemC compilation, elaboration and execution
• Modules, Hierarchy and important data types
• SC_MODULE, SC_CTOR, SC_HAS_PROCESS, Processes:-SC_THREAD, SC_METHOD, sc_main and sc_start.
• Events and Sensitivity – Static and Dynamic Sensitivity, Interaction of Processes and Events, Blocking and Non-blocking styles,
• Channels and Interfaces-
• Pure Virtual functions and Abstract Classes
• Fundamentals of Interfaces and Channel, separation (or independence) of "communication mechanism" and "module implementation".
• Primitive Channels:- sc_fifo, sc_mutex, sc_semaphore
• Evaluate-Update channels: - sc_signal, sc_buffer, sc_signal_resolved and sc_signal_rv.
• SC_MODULE, SC_CTOR, SC_HAS_PROCESS, Processes:-SC_THREAD, SC_METHOD, sc_main and sc_start,
• Ports and Hierarchical Channels, Transactors (Adaptors),
• Suggested Templates and tips on "System Design" (with a sample "system" modeling exercise).